Examples

Finished designs, open to explore.

Each example went through the whole Tapeo workflow. Open one to read its RTL, replay its waveforms, inspect every tool run, and orbit its 3D layout. Exploring is free and needs no account; make your own copy to change it.

• Custom ASIC / SoCMinimal synchronous counterA minimal synchronous counter taken all the way from RTL to a routed, DRC- and LVS-clean layout. The best place to start.15 files22/22 goals met3D layoutSkyWater 130 nm high-speed standard-cell familyExplore →
• Custom ASIC / SoCSimple synchronous watchdogA synchronous watchdog timer that raises an alarm when it is not serviced in time, with every goal verified.15 files29/29 goals met3D layoutSkyWater 130 nm high-speed standard-cell processExplore →
• Custom ASIC / SoCRegistered running-sum monitorA registered running-sum monitor for a sensor stream: simulation, timing, power grid, and a full layout.15 files29/29 goals met3D layoutSkyWater 130 nm standard-cell technologyExplore →
• CPU / MCUSmall multi-cycle RV32I coreA small multi-cycle RISC-V (RV32I) core running compiled C, with a placed-and-routed layout. Some stretch goals are still open, which is shown honestly.29 files16/22 goals met3D layoutSkyWater 130 nm high-density standard-cell processExplore →